Pop noise removing circuit for a double deck cassette tape recorder

ABSTRACT

A pop noise removing circuit for a double deck cassette tape recorder, which can thoroughly remove the pop noise occurring during the actuation of two deck leaf switches to drive deck motors. The circuit comprises means detecting ON-OFF operation of the deck leaf switches and generating control signals in response to the ON-OFF operation of the deck leaf switches, and means for muting left and right channel output signals from a head switching integrated circuit in dependence upon the control signals generated by the detecting means.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to a pop noise removing circuit for a double deck cassette tape recorder, and more particularly, to a circuit for removing pop noise which occurs during the actuation of deck leaf switches to drive deck motors.

2. Description of the Prior Art

In general, deck leaf switches for a double deck cassette tape recorder control the power supply to a head switching integrated circuit (IC) for switching two audio heads, and the head switching IC outputs left and right channel audio signals. In this type of double deck cassette tape recorder, the left and right channel output signals become unstable because pop noises occur instantaneously in the head switching IC during the ON-OFF operation of the deck leaf switches.

In order to remove such pop noises, conventional double deck cassette tape recorders employ resistors and capacitors which are connected between the leaf switches and the head switching IC respectively and which can delay the power supply to the head switching IC during the actuation of the leaf switches. However, these conventional cassette tape recorders have a drawback that it is impossible to remove the pop noises thoroughly.

SUMMARY OF THE INVENTION

It is an object of the present invention to provide a pop noise removing circuit for a double deck cassette tape recorder which can thoroughly remove pop noises occuring during the ON-OFF operation of the deck leaf switches.

In accordance with the present invention, there is provided an improve system for automatically muting left and right channel output signals during the actuation of the deck leaf switches.

More particularly, in accordance with the invention, there is provided a pop noise removing circuit for a double deck cassette tape recorder having deck leaf switches and a head switching IC, comprising:

means detecting ON-OFF operation of the deck leaf switches and generating control signals in response to the ON-OFF operation of the deck leaf switches; and

means for muting the left and right channel output signals from the head switching IC in dependence upon the control signals.

BRIEF DESCRIPTION OF THE DRAWINGS

This invention will now be described by way of illustrative example with reference to the accompanying drawings, in which:

FIG. 1 is a circuit diagram of the embodiment of the present invention; and

FIGS. 2(A-G) are a timing chart for dipicting the waveforms appeared at various points in FIG. 1 during the actuation of the deck leaf switches.

DESCRIPTION OF THE PREFERRED EMBODIMENT

Referring to FIG. 1, the power supply B⁺ through the deck leaf switch SW₁ or SW₂ is applied to the head switching IC 10 through the resistors R₁ and R₂ and the capacitors C₁ and C₂ respectively, and the head switching IC 10 switches the head H₁ or H₂ on/off. More particularly, an electronic switch (not illustrated) constituted within the head switching IC 10 is connected to the head H₁ or H₂ by means of the deck leaf switch SW₁ or SW₂ so that the head switching IC 10 outputs the left and right channel audio signals.

The ON-OFF operation of the deck leaf switches SW₁ and SW₂ is dectected by a detector section 20 and during the ON-OFF operation of the deck leaf switches SW₁ and SW₂, control signals generated from the detector section 20 are fed to a muting section 30.

Firstly, when the deck leaf switch SW₁ is on, the power supply B⁺ through the deck leaf switch SW₁ is applied to the base of a transistor Q₁ in the muting section 30 through a first timing circuit consisting of resistors R₆ and R₇ connected in parallel, diodes D₂ and D₃ and a capacitor C₄ in the detector section 20 as well as to the base of a transistor Q₂ through a third timing circuit consisting of a diode D₁, a capacitor C₃ and a resistor R₅.

On the other hand, when the deck leaf switch SW₂ is on, the power supply B⁺ through the deck leaf switch SW₂ is applied to the collector of the transistor Q₂ through a resistor R₃, and to the base of the transistor Q₁ through a second timing circuit consisting of a resistor R₄, a capacitor C₅ and a diode D₄.

When the transistor Q₁ in the muting section 30 is turned on, the power supply B⁺ applied to the collector of the transistor Q₁ passes to ground through the collector/emitter conductive path of the transistor Q₁. On the contrary, when the transistor Q₁ is turned off, the power supply B⁺ applied to its collector is then applied to the bases of transistors Q₃ and Q₄ through a diode D₆ and bias resistors R₉ and R₁₀ for respectively muting the left and right channel audio signals from the head switching IC 10.

Referring again to FIG. 1, when both of the deck leaf switches SW₁ and SW₂ are off, the power supply B⁺ is not applied to the head switching IC 10 and the electronic switch in the head switching IC 10 cuts out the connection with the heads H₁ and H₂. At this moment, the base voltage of the transistor Q₁ becomes LOW and the transistor Q₁ is turned off. Therefore, the transistors Q₃ and Q₄ are both turned on because the power supply B⁺ through the resistor R₈ and the diode D₆ is applied to the bases of the transistors Q₃ and Q₄ through the resistors R₉ and R₁₀ respectively. Thus, when the deck leaf switches SW₁ and SW₂ become off, output terminals of the left and right channel audio signals are connected to ground through the collector/emitter conductive paths of the transistors Q₃ and Q₄ and thus the left and right channel audio signals are muted.

When the deck leaf switch SW₁ is on as shown in FIG. 2(A), the waveform of FIG. 2(C) appears at point c due to the power supply B⁺ applied through the deck leaf switch SW₁. However, the pop noise as shown in FIG. 2(B) occurs in the head switching IC 10 due to the difference between switching times of the head switching IC 10 and the deck leaf switch SW₁. The power supply B⁺ through the deck leaf switch SW₁ is applied to the head switching IC 10 after somewhat moderated by the resistor R₁ and the capacitor C₁ and drives the head H₁. But the left and right channel output signals becomes unstable because the pop noise is not thoroughly removed. However, at this moment, the left and right channel output signals from the head switching IC 10 pass to ground because both of the transistors Q₃ and Q₄ are turned on as described above. Simultaneously, the power supply B⁺ is charged to the capacitor C₄ through the resistors R₆ and R₇ in the detector section 20 and accordingly, the voltage waveform as shown in FIG. 2(E) appears at point e. As this voltage waveform is applied to the base of the transistor Q₁ through the diode D₃, the transistor Q₁ is turned on, making the power supply B⁺ applied through the resistor R₈ pass to ground. Thus, the transistors Q₃ and Q₄ are turned off because each of their base voltages becomes LOW and the waveform as shown in FIG. 2(G) appears at point g which is connected to the collector of the transistor Q₁, resulting in that the left and right channel signals are muted during the time set by the first timing circuit.

In this state, if the deck leaf switch SW₁ becomes off, the waveform of FIG. 2(C) appears at point c. Thus, the power supply B⁺ charged in the capacitor C₄ is instantaneously discharged to ground through the diode D₂ and the resistor R₆ and the waveform of FIG. 2(E) appears at point e, making the transistor Q₁ turned off. Therefore, the power supply B⁺ having the waveform of FIG. 2(G) appears at point g, turns on the transistors Q₃ and Q₄ and thus the left and right channel signals pass to ground through the transistors Q₃ and Q₄, resulting in that the pop noise of FIG. 2(B) mixed with the left and right channel signals is removed. At this moment, the transistor Q₂ is turned off by the deck leaf switch SW₁ which maintains the OFF state.

On the other hand, if the deck leaf switch SW₂ becomes on as shown in FIG. 2(A), the waveform of FIG. 2(D) appears at point d and the pop noise of FIG. 2(B) occurs in the head switching IC 10. The power supply B⁺ is applied to the head switching IC 10 through the resistor R₂ and the capacitor C₂ and drives the head H₂. At this moment, however, the left and right channel signals are muted by the transistors Q₃ and Q₄ which are turned on as described above. Simultaneously, the power supply B⁺ through the deck leaf switch SW₂ is charged to the capacitor C₅ through the resistors R₃ and R₄, making the transistor Q₁ turned on, and thus the voltage at point g has the waveform of FIG. 2(G). Therefore, the transistors Q₃ and Q₄ are turned off, resulting in that the left and right channel signals are normally fed to the next stage after the pop noise is removed.

If the deck leaf switch SW₂ becomes off again in the above-described state, the waveform of FIG. 2(D) appears again at point d and the power supply B⁺ applied to the base of the transistor Q₁ is cut off, causing this transistor Q₁ turned off. Therefore, the power supply B⁺ having the waveform of FIG. 2(G) appears at point g and is applied to the bases of the transistors Q₃ and Q₄. Accordingly, the transistors Q₃ and Q₄ are turned on and the left and right channel output signals are muted, resulting in that the pop noise of FIG. 2(B) mixed with the signals is removed. At this moment, the transistor Q₂ is turned off because the power supply B⁺ applied to its base is cut off by the OFF-stated deck leaf switch SW₁.

On the other hand, if the deck leaf switch SW₂ becomes on or off when the other deck leaf switch SW₁ remains in the ON state, the pop noise is not mixed with the left and right channel output signals because the electronic switch in the head switching IC 10 is connected to the head H₁.

On the contrary, if the deck leaf switch SW₁ becomes on or off when the deck leaf switch SW₂ remains in the ON state, the waveforms of FIG. 2(C) and 2(D) appear at point c and d respectively, and the electronic switch in the head switching IC 10 is switched from the head H₂ to the head H₁ in response to the power supply B⁺ applied through the deck leaf switch SW₁. Therefore, when the deck leaf switch SW₁ is on, the power supply B⁺ through the deck leaf switch SW₁ is applied to the base of the transistor Q₂ through the diode D₁, the capacitor C₃ and the resistor R₅, causing the transistor Q₂ turned on, and the power supply B⁺ at point d as shown in FIG. 2(D) passes to ground through the resistor R₃ and the transistor Q₂. Thus, the transistor Q₁ is then turned off, the waveform of FIG. 2(G) appears at point g and the transistors Q₃ and Q₄ are turned on, resulting in that the pop noise mixed with the left and right channel output signals is removed.

As described above, every time when the deck leaf switch SW₁ or SW₂ is activated, the detector section 20 outputs the control signal to the muting section 30 and the left and right channel output signals from the head switching IC 10 can be muted by the muting section 30, causing the audio signals stably fed to the next stage after the pop noise is removed.

From the foregoing, it will be apparent that the present invention provides the advantage that the pop noise which occurs during the actuation of the deck leaf switches of audio systems can be removed thoroughly. 

What is claimed is:
 1. A pop noise removing circuit for a double deck cassette tape recorder having first and second deck leaf switches and a head switching IC, comprising:a power supply; detecting means for detecting the ON-OFF operation of the first and second deck switches; control signal generating means for generating delayed control signals in response to said detecting means; and means for muting left and right channel output signals from said head switching IC, said muting means being controlled by said control signals generated by said control signal generating means; said control signal generating means further comprising a first timing circuit for providing a predetermined time delay of said power supply fed to said muting means through the first deck leaf switch, a second timing circuit feeding said power supply through the second leaf deck switch to said muting means, a transistor receiving said power supply through the second leaf deck switch into its collector, and a third timing circuit feeding said power supply through the first deck leaf switch to the base of said transistor.
 2. A pop noise removing circuit according to claim 1, wherein said muting means further comprises a transistor means having a base electrode coupled to said control signal generating means, and first and second transistors receiving the collector output of said transistor means into their bases and receiving said left and right channel output signals from said head switching IC into their collectors respectively.
 3. A pop noise removing circuit according to claim 2, wherein said transistor means further comprises an emitter electrode coupled to a diode. 